Lenovo G555 Compal LA-5082P PVT 0318 Schematic Circuit Diagram
Lenovo G555 Compal LA-5082P PVT 0318 Schematic Circuit Diagram
The view of an NMOS Transistor
A PMOS transistor works in similar but opposite behavior. P-type silicon is used for only source and drain, with N-type silicon used between them. When a negative voltage is put on the gate, the gate electrode creates a field that throws electrons from the N-type silicon between the source and drain gate. That, in turn, changes that are to react as if it were P-type silicon, creating a way for current to flow and turning the transistor “on.” When both NMOS and PMOS field-effect transistors are combined in a complementary layout, power is used only when the transistors are switching, making dense, low power circuit designs are possible. Because of this, virtually all modern processors are planned using CMOS (Complementary Metal Oxide Semiconductor) technology.
Compared to a tube, a transistor is much more efficient as a switch and can be small to a microscopic scale. Since the transistor was invented, engineers have tried to make it smaller and smaller. In 2003, NEC researchers discover a silicon transistor of only five nanometers (billionths of a meter) in size. Other technologies, such as Graphene and carbon nanotubes, are looking to produce even smaller transistors, down to the molecular or even atomic scale. In 2008, British researchers invented a Graphene-based transistor only 1 atom thick and 10 atoms (1nm) across, and in 2010, IBM researchers built Graphene transistors switching at a rate of 100GHz, thus building the way for future chips to denser and faster than possible with silicon-based designs.
