Lenovo G575 COMPAL PAWGC PAWGD LA-6755P LA-6757P REV.1.0 Schematic Circuit Diagram
Lenovo G575 COMPAL PAWGC PAWGD LA-6755P LA-6757P REV.1.0 Schematic Circuit Diagram
The view of an NMOS Transistor
In the previous post, we know about the view of an NMOS transistor. In this post, I discuss or finalized the topics.
In 2012, Intel discovered its Ivy Bridge processors using a revolutionary new
Tri-Gate three-dimensional transistor design, initially built using a
22nm process. This diagram was first announced by Intel back in 2002;
however, it took 10 years to complete the process and to create the
manufacturing processes for production. Tri-Gate transistors differ from
common two-dimensional planar transistors in that the source is
built as a raised “fin,” with three conducting channels between the
source and the drain (see Figure 1.3). This allows much more surface area for
flow than the single flat channel on a planar transistor and improves
the total drive current and switching speed with less current leakage.
Two square walls merge horizontally and vertically over a rectangular
box where the square box indicates “Gate,” the vertical labeled “Drain.”
The layer where the rectangles merge is indicated as “Source.” The sides of the
layer are indicated “Oxide” and the base is labeled “Silicon Substrate.”
