More lanes were added as processors improved, up to a point. Because just one byte passes through at a time, an 8-bit chip may be compared to a single-lane highway (1 byte equals 8 individual bits). With two bytes flowing at a time, the 16-bit semiconductor resembles a two-lane highway. To transport a large number of vehicles, you may have four lanes in each direction; this layout equates to a 32-bit data bus, which can move four bytes of data at a time. To put it another way, a 64-bit data bus is equivalent to an eight-lane highway transporting data into and out of the device.

After 64-digit wide buses were reached, chip architects, observed that they couldn't speed up further, in light of the fact that it was too difficult to even consider synchronizing each of the 64 bits. It was discovered that by reverting back to fewer lanes, the speed of the bits could be increased (that is, the cycle time could be reduced), allowing for even higher bandwidths. As a result, many modern processors feature data buses that are only 4-bit or 16-bit wide, yet have better bandwidths than the 64-bit buses they replaced.

The utilization of multiple separate buses for various functions is another innovation in newer CPUs.

Newer CPUs feature distinct physical buses for data to and from the chipset, RAM, and graphics card slot, whereas older processors had a single bus for all data (s).

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