Wistron B575 RSA Motherboard Schematic Circuit Diagram
Wistron B575 RSA Motherboard Schematic Circuit Diagram
Data I/O Bus
The speed and width of a processor's external data bus are two of its most important features. The rate at which data may be transferred into or out of the processor is determined by these parameters.
In a computer, data is delivered as digital information, which is represented as 1s and 0s by specified voltages or voltage changes happening within specific time intervals. Increase either the cycle time or the number of bits delivered at a time, or both, to increase the quantity of data sent (called bandwidth). Processor data buses have grown from 8 bits to 64 bits in size over time. You can send more individual bits in the same interval if you have additional connections. A 64-bit (8-byte) wide data bus is found in all current processors, from the first Pentium and Athlon to the newest Core i7, AMD FX 95xx series, and even the Itanium series. As a result, they may send and receive 64 bits of data at a time between the motherboard chipset and system memory.
Consider a highway and the traffic it carries to have a better understanding of this information flow. If a highway only has one lane for each direction of travel, only one car may go in that direction at a time. If you wish to boost traffic flow (move more cars in a given amount of time), you can do so by increasing car speeds (shortening the distance between them), adding additional lanes, or doing both.
