Quanta AT5 DA0AT5MB8E0 BoardView

Quanta AT5 DA0AT5MB8E0 BoardView

Quanta AT5 DA0AT5MB8E0 BoardView

Internal Level 1 Cache

Starting with the 486 families, all current CPUs include an integrated L1 cache and controller. The capacity of the integrated L1 cache varies per CPU, starting at 8KB for the original 486DX and increasing to 128KB or more in the most recent processors. Each CPU core has its own L1 cache in multicore processors. In addition, the L1 cache is split into equal halves for instructions and data.

To understand the importance of cache, you must first understand the relative speeds of CPUs and memory. The issue is that processor speeds are typically expressed in MHz or GHz (millions or billions of cycles per second), but memory speeds are frequently expressed in nanoseconds (billionths of a second per cycle). The bandwidth of most newer types of memory is defined in megabytes per second (MBps) (throughput).

Both are frequency- or real-time-based measurements. Because a 233MHz processor cycles at 4.3 nanoseconds, you'd need 4ns RAM to keep up with a 200MHz CPU. Also, keep in mind that a 233MHz system's motherboard normally runs at 66MHz, which equates to 15ns every cycle and needs 15ns memory to keep up. Finally, 60ns main memory (typical on many Pentiumclass computers) amounts to around 16MHz clock speed. A typical Pentium 233 system has a processor that runs at 233MHz (4.3ns per cycle), a motherboard that runs at 66MHz (15ns per cycle), and primary memory that runs at 16MHz (60ns per cycle). This may appear to be an out-of-date example, but as you'll see in a minute, the statistics presented here make it simple for me to describe how cache memory works.

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